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Ordering number:ENN5188
Monolithic Linear IC
LA9220M
Analog Signal Processor Circuit (ASP) for CD Players
Overview
The LA9220M is an analog signal processing and servo control bipolar IC designed for use in compact disc players ; a compact disc player can be configured by combining this IC, a CD-DSP such as the LC78681KE, and a small number of additional components.
Package Dimensions
unit:mm 3159-QIP64E
[LA9220M]
17.2 1.0 0.8 14.0 0.35 1.6 1.0 0.15
33
Functions
I/V amplifier, RF amplifier (with AGC), SLC, APC, VCOC amplifier, VCO (supports double-speed playback), FE, TE (with VCA and auto-balance function), tracking servo amplifier (with offset cancellation function), spindle servo amplifier (with gain switching function), sled servo amplifier (with off function), focus detection (DRF, FZD), track detection (HFL, TES), defect detection, and shock detection.
17.2
1.6
1.0
48 49 32
14.0 0.8
17
1.0
1
16
3.0max
0.8
64
0.1 2.7
15.6
SANYO : QIP64E
Features
The following automatic adjustment functions are built in. * Focus offset auto cancel. * Tracking offset auto cancel. * EF balance auto adjustment. * RF level AGC function. * Tracking servo gain RF level following function.
Specifications
Maximum Ratings at Ta = 25C, Pins 22, 45=GND
Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol Vsup max Pd max Topr Tstg Pin 56, 64 Conditions Ratings 7 350 -25 to +75 -40 to +125 Unit V mW
C C
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
30801TN (KT)/92595HA(II) No.5188-1/20
LA9220M
Operating Conditions at Pins 22, 45=GND
Parameter Recommended supply voltage Operating supply voltage Symbol VCC VCC op Conditions Ratings +5 3.6 to 5.5 Unit V V
Operating Characteristics at Ta=25C, Pins 22, 45=GND, VCC (pins 56, 64)=5V
Parameter Current drain Reference voltage [Interface] CE-Vth CL-Vth DAT-Vth Maximum CL frequency [RF amplifier] RFSM no signal voltage Minimum gain [Focus amplifier] FDO gain FDO offset Off time offset Offset adjustment step F search voltage H F search voltage L [Tracking amplifier] TE gain MAX TE gain MIN TE-3dB TO gain TGL offset TGH offset THLD offset Off 1 offset Off 2 offset Offset adjustment step Balance range H Balance range L TOFF-VTH TGL-VTH [PH] No signal voltage [BH] No signal voltage [DRF] Detection voltage Output voltage H Output voltage L [FZD] Detection voltage 1 Detection voltage 2 [HFL] Detection voltage Output voltage H Output voltage L [TES] Detection voltage LH Detection voltage HL Output voltage H Output voltage L TES-LH TES-HL TES-H TES-L TESI, difference from VR TESI, difference from VR -0.15 0.05 4.5 -0.10 0.10 4.9 0 +0.5 -0.05 0.15 V V V V HFLvth HFL-H HFL-L Difference from VR at RFSM -0.35 4.5 -0.2 4.9 0 +0.5 -0.05 V V V FZD1 FZD2 FE, difference from VR FE, difference from VR 0 +0.2 0 V V DRFvth DRF-H DRF-L Difference from VR at RFSM -0.60 4.5 -0.35 4.9 0 +0.5 -0.20 V V V BH o Difference from RFSM 0.45 0.65 0.85 V PHo Difference from RFSM -0.85 -0.65 -0.45 V TEGmax TEGmin TEfc TOG TGLost TGHost THLDost OFF1ost OFF2ost TOstep BAL-H BAL-L TOFFvth TGLvth f=10kHz, E : 1M-input, PH1=4V f=10kHz, E : 1M-input, PH1=1V E : 1M-input TH TO gain, THLD mode Servo on, TGL=H, TO TGL=L, difference from TGL offset, TO THLD mode, difference from TGL offset, TO TOFF=H TOFF2 off (IF) TO gain E/F input, TB=5V gain E/F input, TB=0V 1.0 1.0 4.0 -250 -50 -50 -50 -50 5.0 -0.5 6. 5 +1.8 60 6.0 0 0 0 0 0 60 +3.5 -3.5 2.5 2.5 3.0 3.0 8.0 +250 +5 0 +5 0 +5 0 +5 0 8.0 +4.0 dB dB kHz dB mV mV mV mV mV mV dB dB V V FDG FDost FDofost FDstep FSmax FSmin FIN2 : 1M-input, FDO Difference from reference voltage, servo on Difference from reference voltage, servo off FD O FDO FDO 3.5 -170 -40 5.0 0 0 50 0.8 -0.8 6.5 +170 +40 dB mV mV V V V RFSMo FIN1, FIN2 : 1M-input, PH1=4V RFSMGmin freq=200kHz, RFSM 1.35 -14.0 1.60 -12.5 1.85 -11.0 V dB CEvth CLvth DATvth CL ma x CE CL DA T 500 0.8 0.8 0.8 V V V kH z Symbol ICCO Vref Conditions VCC1 (Pin 64)+VCC2 (Pin 56) VR Ratings min 25 2.3 ty p 40 2.5 max 55 2.7 Unit mA V
Continued on next page.
No.5188-2/20
LA9220M
Continued from preceding page.
Parameter [JP] Output voltage H Output voltage L [Spindle amplifier] Offset 12 Offset 8 Offset off Output voltage H12 Output voltage L12 Output voltage H18 [Sled amplifier] SLEQ offset Offset SLD Offset off Off VTH [SLC] No signal voltage [Shock] No signal voltage Detection voltage H Detection voltage L [DEF] Detection voltage Output voltage H Output voltage L [APC] Reference voltage Off voltage [VCO] Free-running frequency fo Upper limit variable width fH Lower limit variable width fL Output level 1 Output level 2 VCOfo VCOfH VCOfL VCOv1 VCOv2 CLK=4.23kHz Difference from fo Difference from fo Normal mode 2FREQ mode 8.14 1. 4 -2.5 0.5 0.5 8.64 2. 1 -1.9 1. 0 1.0 9.14 2.8 -1.3 MHz MHz MHz Vp-p Vp-p LDS LDDoff LDS voltage at which LDD=3V LDD 150 3.9 180 4. 3 210 4.6 mV V DEFvth DEF-H DEF-L Difference between LF2 voltage when RFSM=3.5V and DEF is detected, and LF2 voltage when RFSM=3.5V 0.20 4.5 0.35 4.9 0 +0.5 0.50 V V V SCIo SCIvthH SCIvthL SCI, difference from VR SCI, difference from VR SCI, difference from VR -40 60 -140 0 100 -100 +4 0 140 -60 mV mV mV SLCo SLC 2.25 2.5 2.75 V SLEQost SLDost SLDof SLOFvth Difference from TO at SLEQ SLEQ=VR, difference from VR Off mode SLOF -30 -100 -40 1.0 0 0 0 1. 4 +3 0 +100 +4 0 2.0 mV mV mV V SPD12ost SPD8ost SPDof SPD-H12 SPD-L12 SPD-H8 Difference from VR at SPD, 12cm mode Difference from VR at SPD, 8cm mode Difference from VR at SPD, OFF mode Difference from offset-12, 12cm mode, CV+=5V, CV-=0V Difference from offset-12, 12cm mode, CV+=0V, CV-=5V Difference from offset-8, 8cm mode, CV+=5V, CV-=0V -40 -40 -30 0.75 -1.25 0.35 0 0 0 1.0 -1.0 0.5 +4 0 +4 0 +3 0 1.25 -0.75 0.65 mV mV mV V V V JP-H JP-L Difference from JP+=0V, JP-=0V at JP+=0V, JP-=5V, TO Difference from JP+=0V, JP-=0V at JP+=5V, JP-=0V, TO 0.35 -0.65 0. 5 -0.5 0.65 -0.35 V V Symbol Conditions Ratings min typ max Unit
No.5188-3/20
LA9220M
Pin Functions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 Symbol FIN2 FIN1 E F TB TE- TE TESI SCI TH TA TD- TD JP TO FD FD- FA FA- FE FE- AGND SP SPI SPG SP- SPD SLEQ SLD SL- SL+ JP- JP+ TGL TOFF TES HFL SLOF CV- CV+ RFSM RFS- SLC SLI DGND VC- VCOC VCO DEF CLK CL DAT CE Contents Pickup photodiode connection pin. Added to pin FIN1 to generate the RF signal, subtracted from pin FIN1 to generate the FE signal. Pickup photodiode connection pin. Pickup photodiode connection pin. Subtracted from pin F to generate the TE signal. Pickup photodiode connection pin. TE signal DC component input pin. Pin to which the TE signal gain setting resistor is connected between this pin and TE pin. TE signal output pin. TES (Track Error Sense) comparator input pin. The TE signal is input through a bandpass filter. Shock detection input pin. Tracking gain time constant setting pin. Pin to connect to the servo high-pass elimination capacitor. Pin for configuring the tracking phase compensation constant between the TD and VR pins. Tracking phase compensation setting pin. Tracking jump signal (kick pulse) amplitude setting pin. Tracking control signal output pin. Focusing control signal output pin. Pin for configuring the focusing phase compensation constant between the FD and FA pins. Pin for configuring the focusing phase compensation constant between the FD- and FA- pins. Pin for configuring the focusing phase compensation constant between the FA and FE pins. FE signal output pin. Pin to which the FE signal gain setting resistor is connected between this pin and FE pin. Analog signal GND. CV+ and CV- pin input signal single-end output. Spindle amplifier input. 12 cm spindle mode gain setting resistor connection pin. Spindle phase compensation constant connection pin, along with the SPD pin. Spindle control signal output pin. Sled phase compensation constant connection pin. Sled control signal output pin. Input pin for sled movement signal from microprocessor. Input pin for sled movement signal from microprocessor. Input pin for tracking jump signal from DSP. Input pin for tracking jump signal from DSP. Input pin for tracking gain control signal from DSP. Gain is low when TGL is high. Input pin for tracking off control signal from DSP. Tracking servo is off when TOFF is high. Output pin for TES signal to DSP. The High Frequency Level is used to determine whether the main beam is positioned over a bit or over the mirrored surface. Sled servo off control input pin. Input pin for CLV error signal from DSP. Input pin for CLV error singal from DSP. RF output pin. RF gain setting and EFM signal 3T compensation constant setting pin, along with the RFSM pin. Slice Level Control is an output pin that controls the data slice level used by the DSP for the RF waveform. Input pin used by DSP for controlling the data slice level. Digital system GND pin. VCO control amplifier input pin. Configures PLL loop filter along with VCOC and PDO of DSP. VCO control output pin. VCO output pin. Disc defect detection output pin. Reference clock input pin. 4.23MHz signal from the DSP is input. Microprocessor command clock input pin. Microprocessor command data input pin. Microprocessor command chip enable input pin.
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LA9220M
Continued from preceding page.
Pin No. 54 55 56 57 58 59 60 61 62 63 64 Symbol DRF LF VCC2 REF1 VR LF2 PH1 BH1 LDD LDS VCC1 RF level detection output (Detect RF). VCO free-running adjustment pin. Servo system and digital system VCC pin. Bypass capacitor connection pin for reference voltage. Reference voltage output pin. Disc detect detection time constant setting pin. RF signal peak hold capacitor connection pin. RF signal bottom hold capacitor connection pin. APC circuit output pin. APC circuit input pin. RF system VCC pin. Contents
Block Diagram
No.5188-5/20
LA9220M
Test Circuit
No.5188-6/20
LA9220M
Description of Operation * APC (auto laser power control) This circuit controls the pickup laser power. The laser is turned on and off by commands from the microprocessor. * RF amplifier (eye pattern output) The pickup photodiode output current (A+C) is input to FIN2 (pin 1), and (B+D) is input to FIN1 (pin 2). The current that is input is converted to the voltage, passes through the AGC circuit, and is then output from the RFSM amplifier output RFSM (pin 41). The internal AGC circuit has a variable range of 3dB, and the time constant can be changed through the external capacitor connected to PH1 (pin 60). In addition, this circuit also controls the bottom level of the EFM signal (RFSM output), and the response can be changed through the external capacitor connected to BH1 (pin 61). The center gain setting for the AGC variable range is set by the resistance between RFSM (pin 41) and RFS- (pin 42) ; if necessary, this resistance is also used for 3T compensation for the EFM signal. * SLC (slice level control) The SLC sets the duty ratio for the EFM signal that is input to the DSP to 50%. The DC level determined by integrating the EFMO signal output from the DSP to determine the duty ratio. * Focus servo The focus error signal is derived by detecting the difference between (A+C) and (B+D), which is (B+D) - (A+C), and is then output from FE (pin 20). The focus error signal gain is set by the resistance between FE (pin 20) and FE- (pin 21). The FA amplifier is the pickup phase compensation amplifier, and the equalizer curve is set by the external capacitor and resistance. Furthermore, this amplifer has a mute function which is applied when VCC is turned on, when the F-SERVO OFF command is sent, and during F-SEARCH. In order to turn the focus servo on, send either the LASER ON command or the F-SERVO ON command. The FD amplifier has a phase compensation circuit, a focus search signal composition function, and an offset cancellation function. Focus seach is initiated by the F-SEARCH command, and a ramp waveform is generated by the internal clock. This waveform is used for focus detection (focus zero cross) with the focus error signal and then turn the focus servo on. The ramp waveform amplitude is set by the resistance between FD (pin 16) and FD- (pin 17). Offset cancellation cancels the IC offset ; adjustment is started by the FOCUS-OFFSET ADJUST START command, and is completed in about 250ms. To cancel even the offset for the IV amplifier, etc., it is necessary to send the F-SERVO ON (LASER OFF) command. The FOCUS-OFFSET ADJUST OFF command is used to return to the state prior to offset cancellation. * Tracking servo The pickup phtodiode output current is input to E (pin 3) and F (pin 4). The current that is input is converted to the voltage, passes through the balance adjustment VCA circuit and then the VCA circuit that follows the gain in the RFAGC circuit, and is then output from TE (pin 7). The tracking error gain is set by the resistance between TE- (pin 6) and TE (pin 7). The TH amplifier alters the servo response characteristics according to the THLD signal, etc., generated internally after detection of the TGL signal from the DSP or the JP signal. When a defect is detected, the THLD mode goes into effect internally. To avoid this, short DEF (pin 49) to L=GND. By inserting an external bandpass filter to remove the shock component from the tracking error signal at SCI (pin 9), the gain is automatically boosted when a defect is detected. The TOFF amplifier that is positioned immediately after TD (pin 13) functions to turn off the servo in response to the TOFF signal from the DSP. The TD amplifier performs servo loop phase compensation ; the characteristics are set by external CR. Furthermore, this amplifer has a mute function, which is applied when VCC is turned on or the TRACK-SERVO OFF command is issued. The muting function is released by the TRACK-SERVO ON command. The TO amplifier has JP pulse composition function and a tracking offset cancellation function. The JP pulse is set by JP (pin 14). (THLD detection is performed internally.) Offset cancellation is completed in about 30ms. The TRACK-SERVO ON command and setting the TOFF pin (pin 35) low are required for offset cancellation. Note : The LC78681KE TOFF ON/OFF command is valid only when disc motor control is in CLV mode. Accordingly, tracking offset is cancelled in normal CLV mode. Note that when performed in STOP mode, external control of the TOFF pin is required.
No.5188-7/20
LA9220M
* Sled servo The response characteristics are set by SLEQ (pin 28). The amplifier positioned after SLEQ (pin 28) has a mute function that is applied either when SLOF (pin 38) goes high or the SLED OFF command is issued. The sled is moved by inputting current to SL- (pin 30) and SL+ (pin 31) ; specifically, the pins are connedted to the microprocessor output ports via resistors, and the movement gain is set by the resistance value of that resistor. It is important to note that if there is a deviation in the resistance values for SL- (pin 30) and SL+ (pin 31), and offset will arise in the SLD output. * Spindle servo This configures the servo circuit, which maintains the linear velocity of the disc at a constant speed, along with the DSP. This circuit accepts signals from the DSP through CV- (pin 39) and CV+ (pin 40) and sets the equalizer characteristics through SP (pin 23), SP- (pin 36), and SPD (pin 27), which are output to SPD (pin 27). The 12-cm mode amplifier gain is set by the resistor connected between SPG (pin 25) and the reference voltage. In 8-cm mode, this amplifier serves as an internal buffer, and SPG (pin 25) is ignored. Note that the gain setting is made for 8-cm mode first, and then 12-cm mode. If SPG (pin 25) is left open, the gain is forcibly set for 8-cm mode, regardless of whether 8-cm or 12-cm mode is in effect. * TES and HFL (traverse signals) When moving the pickup from the outer track to the inner track, the EF output from the pickup must be connected so that the phase relationship of TES and HFL is as shown in the diagram below. For the TESI input, the TES comparator has negative polarity and hysteresis of approximately 100mV. An external bandpass filter is needed in order to extract only the required signal from the TE signal.
* DRF (luminous energy determination) DRF goes high when the peak of the EFM signal (RFSM output) held by the PH1 (pin 60) capacitor exceeds approximately 2.1V. The PH1 (pin 60) capacitor affects the DRF detection time constant and the RFAGC response bidirectional setting.
No.5188-8/20
LA9220M
* Focus determination Focus is assumed to be obtained when the focus error signal "S" curve reaching REF +0.2V is detected, and the "S" curve subsequently returns to REF.
* DEFECT The mirrored surface level is maintained by the capacitor for LF2 (pin 59) ; when a drop in the EFM signal (RFSM output) reaches 0.35V or more, a high signal is output to DEF (pin 49). If DEF (pin 49) goes high, the tracking servo enters THLD mode. In order to prevent the tracking servo from entering THLD mode when a defect is detected, prevent DEFECT from being output by either shorting DEF (pin 49) to GND, or shorting LF2 (pin 59) to GND. The DEFECT output is driven by constant current (approximately 100A).
* VCC /REF/GND VCC1 (pin 64) VCC2 (pin 56) AGND (pin 22) DGND (pin 45)
: RF system : SERVO system, DIGITAL system : RF system, SERVO system : DIGITAL system
* PLL circuit VCOC is the loop filter setting amplifier for the EFM signal PLL, and equalizes the PLL phase comparison output from the DSP, and outputs it to the internal VCO. VCO is the VCO circuit for the EFM signal PLL, and requires the reference clock from the DSP (4.23MHz only ; does not support 2.1609MHz for the LC7860KA, etc.). The VCO free-running frequency can be varied according to the current input to LF (pin 55). The VCO output can be turned on or off by using the VCO-OLT ON/OFF command.
Command Normal speed Double speed VCO output frequency Average : 8.6436 MHz Average : 17.2872 MHz
* Reset circuit The power-on reset is released when VCC exceeds approximately 2.8V. * Microprocessor interface Because the Reset (Nothing) command initializes the LA9220M, it must be used carefully. The LA9220M command acceptance (mode switching) timing is defined by the internal clock (4.23MHz divided to 130kHz) after the falling edge of CE (RWC) ; therefore, when commands are sent consecutively, CE must go low for at least 10s. For this reason, the 4.23MHz clock is required even when VCO of LA9220M is not used. 2BYTECOMMAND RESET is used only for the purpose of masking two-byte data. All instructions can be input by setting CE high and sending commands synchronized with the CL clock from the microprocessor to DAT (pin 52) in LSB first format. Note that the command is executed at the falling edge of CE.
No.5188-9/20
LA9220M
Timing chart
Command List
MSB LSB RESET FOCUS START VCO-OUT ON VCO-OUT OFF VCO-2FREQ VCO-NORMAL 2BYTE-COMMAND DETECT 2BYTE-COMMAND DETECT 2BYTE-COMMAND RESET Command Reset mode Power on mode DSP RESET (NOTHING) FOCUS START #1
00000000 00001000 10001110 10001101 11000001 11000010 11110000 11111000 11111111

Nonadjusted
OSC ON OSC OFF 2TIMES-SPEED PLAY MODE NORMAL-SPEED PLAY MODE 2BYTE-COMMAND DETECT 2BYTE-COMMAND DETECT 2BYTE-COMMAND RESET
10010000 10010001 10010010 10010011 10010100 10010101 10010110 10010111 10011000 10011001 10011010 10011011 10011100 10011101 10011110
FOCUS-OFFSET ADJUST START FOCUS-OFFSET ADJUST OFF TRACK-OFFSET ADJUST START TRACK-OFFSET ADJUST OFF LASER ON LASER OFF ; F-SERVO ON LASER OFF ; F-SERVO OFF SPINDLE 8CM SPINDLE 12CM SPINDLE OFF SLED ON SLED OFF E/F BALANCE START TRACK-SERVO OFF TRACK-SERVO ON
- - - - - - - - - - - - - - -
Timing chart
No.5188-10/20
LA9220M
Notes Concerning Microprocessor Program Creation (Supplementary) 1. Commands. After sending the FOCUS START command and the E/F BALANCE START command, send 11111110 (FEH) in MSB LSB order to clear the internal registers of the IC. Reason : Although the above commands are executed at point in the timing chart below, the same commands will be executed again at point TM if there is subsequent input to CE as shown below. Timing chart
2. When sending the TRACK-OFFSET ADJUST START command or the FOCUS-OFFSET ADJUST START command after either the VCC ON (POWER ON RESET), RESET command or a corresponding OFFSET ADJUST OFF command, waiting time is necessary as listed below, (Only when a 4.2MHz clock is input.) TRACK-OFFSET ADJUST START : 4ms or more FOCUS-OFFSET ADJUST START : 30ms or more 3. E/F balance adjustment E/F balance adjustments should be made in a bit region of the disc , not a mirrored region. (This is because the E/F balance adjustment entails about 100 to 200 track kicks.) Pattern Design Notes To prevent signal jump-in from CV+ (pin 40) to RFSM (pin 41), a shielding line is necessary in between.
No.5188-11/20
LA9220M
Pin Internal Equivalent Circuit
Pin No., ( ) : Pin Name Pin 1 (FIN2) Pin 2 (FIN2) Internal Equivalent Circuit
Pin 3 (F) Pin 4 (F)
Pin 5 (TB) Pin 6 (TE-) Pin 17 (FD-) Pin 21 (FE-) Pin 26 (SP-) Pin 28 (SLEQ) Pin 44 (SLI) Pin 46 (VC-)
Pin 16 (FD) Pin 27 (SPD) Pin 43 (SLC)
Pin 8 (TESI) Pin 36 (TES)
Continued on next page.
No.5188-12/20
LA9220M
Continued from preceding page.
Pin No., ( ) : Pin Name Pin 9 (SCI) Pin 34 (TGL) Internal Equivalent Circuit
Pin 7 (TE) Pin 10 (TH)
Pin 11 (TA) Pin 12 (TD-)
Pin 13 (TD)
Continued on next page.
No.5188-13/20
LA9220M
Continued from preceding page.
Pin No., ( ) : Pin Name Pin 14 (JP) Internal Equivalent Circuit
Pin 15 (TO)
Pin 18 (FA) Pin 19 (FA-) Pin 20 (FE)
Continued on next page.
No.5188-14/20
LA9220M
Continued from preceding page.
Pin No., ( ) : Pin Name Pin 24 (SPI) Pin 25 (SPG) Internal Equivalent Circuit
Pin 29 (SLD) Pin 30 (SL-) Pin 31 (SL+)
Pin 32 (JP-) Pin 33 (JP+)
Pin 35 (TOFF)
Continued on next page.
No.5188-15/20
LA9220M
Continued from preceding page.
Pin No., ( ) : Pin Name Pin 37 (HFL) Pin 49 (DEF) Pin 54 (DRF) Internal Equivalent Circuit
Pin 38 (SLOF)
Pin 39 (CV-) Pin 40 (CV+) Pin 23 (SP)
Pin 42 (RF-)
Pin 50 (CLK)
Continued on next page.
No.5188-16/20
LA9220M
Continued from preceding page.
Pin No., ( ) : Pin Name Pin 51 (CL) Pin 52 (DAT) Pin 53 (CE) Internal Equivalent Circuit
Pin 57 (REFI) Pin 58 (VR)
Pin 59 (LF2)
Pin 41 (RFSM) Pin 60 (PH1) Pin 61 (BH1)
Continued on next page.
No.5188-17/20
LA9220M
Continued from preceding page.
Pin No., ( ) : Pin Name Pin 62 (LDD) Internal Equivalent Circuit
Pin 63 (LDS)
Pin 47 (VCOC) Pin 55 (LF)
Pin 48 (VCO)
No.5188-18/20
LA9220M
Sample Application Circuit
No.5188-19/20
LA9220M
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be expor ted without obtaining the expor t license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of March, 2001. Specifications and information herein are subject to change without notice.
PS No.5188-20/20

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